In search of a low overhead and efficient line encoding, the IEEE task force has recently introduced a 64b/66b encoding scheme for 10 Gigabit Ethernet, which, with only 3.125% overhead, provides an acceptable level of transmission density and run length. The new scheme has been modified and accepted into the IEEE 802.3 Standard of 10 Gigabit Ethernet (IEEE802.3ae).
Providing an acceptable level of transmission density at a low overhead cost, the 64b/66bencoding is a strong candidate for high speed inter-shelf, chip-to-chip, and backplane interconnections. However, interconnection of high speed elements via the backplane or extended wires (cable, optical fiber) requires close attention to error handling, especially at bit rates of multiple Gbps.
Unlike its predecessor (8b/10b encoding), the 64b/66bencoding is not a mapping of 64b data words to predefined 66-bit code words. In fact, 64b/66b encoding uses scrambling. Each 64-bit data word is scrambled using a self-synchronous scrambler, which has a polynomial of the form: x58+x39+1. Then, a two bit preamble is added to the scrambled code word. If the codeword contains data characters only, the two-bit preamble is “01.” If the codeword contains data characters as well as control characters, the preamble bits are “10” (FIG. 2). Preambles “00” and “11” are considered code errors and cause the packet to be invalidated.
Attributable to the presence of preamble bits (“01” or “10”), the run length is deterministically (i.e., guaranteed to be) less than 64,which is well below the SONET/SDH requirement of run length of 72.
One of the problems associated with the 64b/66b encoding scheme is that there is no provisioning of error corrections on 64b/66b encoded lines. It can be shown that even a single-bit error correction can significantly enhance the link quality. It has also been shown that the use of CRC16 over 8 bytes of the SDL (single data link) header is unique enough to correct single-bit errors. Furthermore, there has been no proposal of using CRC16 when the errors might be duplicated, for instance, in the presence of a self-synchronous scrambler.
The new 64b/66b encoding is based on a self-synchronous scrambler; therefore, it duplicates the errors occurring on the transmission line. The following paragraphs will make clear how a self-synchronous scrambler duplicates errors.
The polynomial of the self-synchronous scrambler is of the form x58+x39+1. FIG. 3 shows a serial implementation of the scrambler. (This scrambler can also be implemented in parallel such that in one clock cycle all 64 bits are scrambled.)
In a self-synchronous scrambler, the receiver scrambler will be in sync with the transmitter scrambler after, at most, 58 bits of data has passed through the scrambler. This scrambler is extremely hard to attack since the initial state of the scrambler is unknown to a malicious user. A self-synchronous scrambler has four advantages: simplicity, very fast synchronization, robustness against false synchronization, and robustness against emulation attacks. The disadvantage is that it duplicates the error. Every transmission error will result, after descrambling, in two additional errors—namely, 39 and 58 bit periods after the original error. This is because the x58+x39+1 descrambler consists of a 58-bit shift register whose input is fed by the received data.
Upon reception, the original error proceeds through the “scrambled data input” of the XOR gate and, at the same time, is fed into the shift register (FIG. 3). That error will propagate through the shift register and 39 bit periods later will show up at the input to the XOR gate. The corresponding received data bit at the “data” input of the XOR gate will be summed modulo-2 with the error to produce a second error—the first additional error. The same thing happens when the original error propagates through the shift register and shows up 58 bit periods later at the input to the XOR gate; this produces a third error or the second additional error. The error multiplication is now complete. There are no further errors generated by that original transmission error because the output of the XOR gate is not fed back to the descrambler. Only the scrambler has feedback.
Although 64b/66b encoding is an efficient line encoding scheme, associated with it are drawbacks and problems that can not be ignored:    (a) Transmission at high bit rates (multiple Gbps) over copper or fiber links requires close attention to error handling. The 64b/66b encoding does not provision for single- or multiple-bit error correction.    (b) Furthermore, the self-synchronous scrambler deployed in 64b/66b encoding duplicates errors. By duplicating errors and—as mentioned in (a)—not provisioning for them, the problem is intensified. Consequently, a simple error correction scheme is not sufficient in 64b/66bencoders.    (c) Also, it is not verified that the strength of CRC16 does not grow weaker over longer blocks, and that it would still be competent enough to correct all patterns of single-bit errors over these longer blocks.
FIG. 4 shows the probability of packet loss for various BERs (bit error rates) with and without error correction. The packet length is assumed as 1500 bytes—that is, Ethernet max packet size. As shown in this figure, with BER of 10−12 (a typical bit error rate mentioned in standards and data sheets), the probability of packet loss without error correction is 1.2e-8.With single-bit error correction, this probability drops to 7.2e-17.If this level of packet loss were to be achieved without doing single-bit error correction, a bit error rate of 1e-20 would have been required. This represents a significant improvement in link quality (from BER of 10−12 to 10−20).
A CRC16 can detect and correct all single-bit errors. Also, it can detect double-bit errors, all errors with an odd number of bits, all burst error of length 16 or less, 99.997% of 17-bit error burst, and 99.998% of 18-bit and longer bursts.
Accordingly, a more reliable error correction scheme that corrects all patterns of single-bit errors while provisioning multiple-bit errors is desirable.